Day9 USB设备速度识别

1 识别原理

默认情况下，USB主机端口的DP，DM都有一个15K的下拉电阻，在设备没有插入时，DP／DM信号电平为低；当有设备插入时，因为设备端DP／DM中有上拉电阻，所以会
把DP或者DM拉高；

USB主机通过DP，DM线的高电平变化情况，可以识别到设备插入和拔出，识别不同USB Device的速度

对于USB2.0来说，有三个等级的设备速度：低速／全速／高速

  1. 低速识别
    在设备DM端接一个1.5K的上拉电阻，如下图所示
    USB 低速设备

  2. 全速识别
    在设备DP端接一个1.5K的上拉电阻，如下图所示
    USB 全速设备

  3. 高速识别
    在设备DP端接一个1.5K的上拉电阻，和全速设备一样；但复位后，USB设备会通过一系列的软硬件握手协议来和HUB协商速度
    具体过程，如下所示

High-speed Detection Handshake (not performed if low-speed device detected by hub):
Note: In the following handshake, both the hub and device are required to detect Chirp J’s and K’s of specified minimum durations. It is strongly recommended that “gaps” in these Chirp signals as short as 16 high-speed bit times should restart the duration timers.

  1. The high-speed device leaves the D+ pull-up resistor connected, leaves the high-speed terminations disabled, and drives the high-speed signaling current into the D- line. This creates a Chirp K on the bus. The device chirp must last no less than 1.0 ms (TUCH) and must end no more than 7.0 ms (TUCHEND) after high-speed Reset time T0.
  2. The hub must detect the device chirp after it has seen assertion of the Chirp K for no less than 2.5 μs (TFILT). If the hub does not detect a device chirp, it must continue the assertion of SE0 until the end of reset.
  3. No more than 100 μs (TWTDCH) after the bus leaves the Chirp K state, the hub must begin to send an alternating sequence of Chirp K’s and Chirp J’s. There must be no Idle states on the bus between the J’s and K’s. This sequence must continue until a time (TDCHSE0) no more than 500 μs before and no less than 100 μs before the end of Reset. (This will guarantee that the bus remains active, preventing the device from entering the high-speed Suspend state.) Each individual Chirp K and Chirp J must last no less than 40 μs and no more than 60 μs (TDCHBIT).
  4. After completing the hub chirp sequence, the hub asserts SE0 until end of Reset. At the end of reset, the hub must transition to the high-speed Enabled state without causing any transitions on the data lines.
  5. After the device completes its chirp, it looks for the high-speed hub chirp. At a minimum, the device is required to see the sequence Chirp K-J-K-J-K-J in order to detect a valid hub chirp. Each individual Chirp K and Chirp J must be detected for no less than 2.5 μs (TFILT).
    a) If the device detects the sequence Chirp K-J-K-J-K-J, then no more than 500 μs (TWTHS) after detection, the device is required to disconnect the D+ pull-up resistor, enable the high-speed terminations, and enter the high-speed Default state.
    b) If the device has not detected the sequence Chirp K-J-K-J-K-J by a time no less than 1.0 ms and no more than 2.5 ms (TWTFS) after completing its own chirp, then the device is required to revert to the full-speed Default state and wait for the end of Reset.

2 注意事项

  1. 对于STM32F105/107/F2/F4来说，内部已经集成上拉／下拉，并根据对应的设备角色和行为，USB内核会自动切换合适电阻；所以外部无需接额外的电阻；
    但是对STM32F103系列来说，必须要外接合适的上拉电阻
  2. 上拉电平的范围是3.0~3.6V
  3. 电阻的精度可以为5%

每日推荐

  1. 暗时间–刘未鹏.pdf

一本关于心智模式、学习方法和时间利用的书籍，就像暗物质一样，看不见，摸不着，但充满了整个宇宙；时间也是类似，很多零碎的时间，如何有效利用起来，是一个很大的学问；

关于作者:刘未鹏

南京大学计算机系硕士毕业
现就职于微软亚洲研究院创新工程中心
兴趣爱好：计算机科学，人工智能，认知科学
博客名 Mind Hacks 的含义：

  • Mind Hacks 是一本书
  • Mind Hacks 是一系列思维工具
  • Mind Hacks 有一个漫长的前生—一个有着近6年历史的技术博客
  • 在CSDN上有超过120万的访问量

豆瓣书评：http://book.douban.com/subject/6709809/
PS：百度一下，有PDF版本可以下载

2015-12-18

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